
PIC18F85J11 FAMILY
DS39774D-page 122
2010 Microchip Technology Inc.
REGISTER 10-8:
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
R/W-0
U-0
R/W-0
U-0
OSCFIE
CMIE
—
BCLIE
LVDIE
TMR3IE
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIE: Oscillator Fail Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 6
CMIE: Comparator Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 5-4
Unimplemented: Read as ‘0’
bit 3
BCLIE: Bus Collision Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 2
LVDIE: Low-Voltage Detect Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 1
TMR3IE: TMR3 Overflow Interrupt Enable bit
1
= Enabled
0
= Disabled
bit 0
Unimplemented: Read as ‘0’